Higher-Order Concurrency for Microcontrollers
Abhiroop Sarkar, Robert Krook, Bo Joel Svensson, Mary Sheeran

TL;DR
This paper introduces SenseVM, a virtual machine with a higher-order concurrency model for microcontrollers, improving safety, composability, and maintainability of concurrent embedded programs.
Contribution
SenseVM provides a portable, message-passing concurrency model for microcontrollers, abstracting unsafe memory operations and enabling custom concurrency abstractions.
Findings
Successfully implemented on nRF52840 and STM32F4 microcontrollers
Demonstrated safer and more composable microcontroller programming
Unified message and interrupt handling through the bridge interface
Abstract
Programming microcontrollers involves low-level interfacing with hardware and peripherals that are concurrent and reactive. Such programs are typically written in a mixture of C and assembly using concurrent language extensions (like and ), resulting in unsafe, callback-driven, error-prone and difficult-to-maintain code. We address this challenge by introducing - a bytecode-interpreted virtual machine that provides a message-passing based model, originally introduced by Reppy, for microcontroller programming. This model treats synchronous operations as first-class values (called ) akin to the treatment of first-class functions in functional languages. This primarily allows the programmer to compose and tailor their own concurrency abstractions and, additionally,…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
