A 1V 5-bits Low Power Level Crossing ADC with OFF state in idle time for bio-medical applications in 0.18um CMOS
Lucas Moura Santana, Duarte Lopes de Oliveira, Lester de Abreu, Faria

TL;DR
This paper presents a low-power 5-bit level crossing ADC designed for biomedical signals, utilizing an OFF state for the comparator during idle times to significantly reduce power consumption in IoE sensor nodes.
Contribution
It introduces a novel approach to turn off the comparator in a level crossing ADC without errors, setting new boundaries for correct operation and enabling substantial power savings.
Findings
Power consumption reduced by up to 45.5% during idle periods
Successfully fabricated and tested the ADC in 0.18um CMOS process
Achieved low power operation suitable for biomedical applications
Abstract
The ubiquitous use of sensing and signal processing is increasing exponentially with the advance of the Internet of Everything (IoE). In this context, the design of every time more power efficient sensor nodes is a must. Within these nodes, one of the most power-hungry components are the analog-to-digital converters (ADC). These components are used everywhere to translate real-world analog signals into computer intelligible digital signals. One of the promising architecture for the sensing of physiological signals is the level crossing ADC due to the sparse characteristics of those signals. One of the challenges to improve the power efficiency of this type of ADC lies in the use of continuous comparators to keep track of the input signal within the voltage references. The aim of this work is to investigate the impact of using continuous comparator which can be turned off without…
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Taxonomy
TopicsAnalog and Mixed-Signal Circuit Design · CCD and CMOS Imaging Sensors · ECG Monitoring and Analysis
