Tensor Networks for Simulating Quantum Circuits on FPGAs

TL;DR

This paper explores using tensor networks on FPGA hardware to efficiently simulate quantum circuits, aiming to reduce memory usage and accelerate quantum computer simulations.

Contribution

It introduces tensor network representations for quantum simulations on FPGAs, addressing memory constraints and improving computational efficiency.

Findings

Tensor networks can reduce memory footprint in quantum simulations.

FPGA-based tensor contractions accelerate quantum circuit simulations.

Tensor network formalism identifies economical tensor contractions.

Abstract

Most research in quantum computing today is performed against simulations of quantum computers rather than true quantum computers. Simulating a quantum computer entails implementing all of the unitary operators corresponding to the quantum gates as tensors. For high numbers of qubits, performing tensor multiplications for these simulations becomes quite expensive, since $N$-qubit gates correspond to $2^{N}$-dimensional tensors. One way to accelerate such a simulation is to use field programmable gate array (FPGA) hardware to efficiently compute the matrix multiplications. Though FPGAs can efficiently perform tensor multiplications, they are memory bound, having relatively small block random access memory. One way to potentially reduce the memory footprint of a quantum computing system is to represent it as a tensor network; tensor networks are a formalism for representing compositions of tensors wherein economical tensor contractions are readily identified. Thus we explore tensor networks as a means to reducing the memory footprint of quantum computing systems and broadly accelerating simulations of such systems.