PIRM: Processing In Racetrack Memories
Sebastien Ollivier, Stephen Longofono, Prayash Dutta, Jingtong Hu,, Sanjukta Bhanja, Alex K. Jones

TL;DR
PIRM introduces a DWM-based in-memory computing approach that uses transverse nanowire access to perform bulk-bitwise operations, significantly improving speed and energy efficiency for arithmetic and query tasks.
Contribution
It presents a novel in-memory computing technique leveraging transverse access in DWM nanowires for efficient bulk-bitwise logic and arithmetic operations.
Findings
PIRM achieves 1.6x speedup over DRAM PIM for queries.
It improves DWM PIM performance by 6.9x for addition and 2.3x for multiplication.
PIRM reduces access latency by 2.1x and energy by 25.2x for arithmetic benchmarks.
Abstract
The growth in data needs of modern applications has created significant challenges for modern systems leading a "memory wall." Spintronic Domain Wall Memory (DWM), related to Spin-Transfer Torque Memory (STT-MRAM), provides near-SRAM read/write performance, energy savings and nonvolatility, potential for extremely high storage density, and does not have significant endurance limitations. However, DWM's benefits cannot address data access latency and throughput limitations of memory bus bandwidth. We propose PIRM, a DWM-based in-memory computing solution that leverages the properties of DWM nanowires and allows them to serve as polymorphic gates. While normally DWM is accessed by applying spin polarized currents orthogonal to the nanowire at access points to read individual bits, transverse access along the DWM nanowire allows the differentiation of the aggregate resistance of multiple…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Advanced Data Storage Technologies · Ferroelectric and Negative Capacitance Devices
