Ultra-Fast, High-Performance 8x8 Approximate Multipliers by a New Multicolumn 3,3:2 Inexact Compressor and its Derivatives
Fereshteh Karimi, Reza Faghih Mirzaee, Ali Fakeri-Tabrizi, Arman Roohi

TL;DR
This paper introduces a novel multicolumn inexact compressor and an ultra-fast approximate multiplier design that reduces computation stages, achieving higher speed and efficiency for applications like image sharpening.
Contribution
It proposes a new multicolumn 3,3:2 inexact compressor and a systematic truncation strategy, enabling faster approximate multipliers with fewer stages than existing solutions.
Findings
Nearly 11.11% higher speed than existing approximate multipliers
Achieved high efficiency in 45 nm technology implementation
Effective in image sharpening applications with satisfactory performance
Abstract
A multiplier, as a key component in many different applications, is a time-consuming, energy-intensive computation block. Approximate computing is a practical design paradigm that attempts to improve hardware efficacy while keeping computation quality satisfactory. A novel multicolumn 3,3:2 inexact compressor is presented in this paper. It takes three partial products from two adjacent columns each for rapid partial product reduction. The proposed inexact compressor and its derivates enable us to design a high-speed approximate multiplier. Then, another ultra-fast, high-efficient approximate multiplier is achieved utilizing a systematic truncation strategy. The proposed multipliers accumulate partial products in only two stages, one fewer stage than other approximate multipliers in the literature. Implementation results by Synopsys Design Compiler and 45 nm technology node demonstrates…
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Taxonomy
TopicsLow-power high-performance VLSI design · Advancements in Semiconductor Devices and Circuit Design · Numerical Methods and Algorithms
