Mitigating Power Attacks through Fine-Grained Instruction Reordering
Yun Chen, Ali Hajiabadi, Romain Poussier, Andreas Diavastos, Shivam, Bhasin, Trevor E. Carlson

TL;DR
This paper introduces a dynamic instruction reordering technique in out-of-order processors that effectively mitigates power analysis side-channel attacks with minimal performance overhead, enhancing security without significant resource costs.
Contribution
It presents a novel scheduling algorithm that reorders instructions based on operand slack to obfuscate execution and improve security against power attacks, outperforming existing countermeasures.
Findings
Security improvements up to 261× with advanced metrics
Performance maintained at 96% of baseline
Effective attack mitigation with minimal overhead
Abstract
Side-channel attacks are a security exploit that take advantage of information leakage. They use measurement and analysis of physical parameters to reverse engineer and extract secrets from a system. Power analysis attacks in particular, collect a set of power traces from a computing device and use statistical techniques to correlate this information with the attacked application data and source code. Counter measures like just-in-time compilation, random code injection and instruction descheduling obfuscate the execution of instructions to reduce the security risk. Unfortunately, due to the randomness and excess instructions executed by these solutions, they introduce large overheads in performance, power and area. In this work we propose a scheduling algorithm that dynamically reorders instructions in an out-of-order processor to provide obfuscated execution and mitigate power…
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Taxonomy
TopicsCryptographic Implementations and Security · Security and Verification in Computing · Physical Unclonable Functions (PUFs) and Hardware Security
