Large zero bias peaks and dips in a four-terminal thin InAs-Al nanowire device

TL;DR

This study investigates electron transport in a thin InAs-Al nanowire device with a four-terminal design, revealing large zero-bias peaks and dips, and explores their origins with implications for topological states.

Contribution

It demonstrates the use of a four-terminal design to accurately measure conductance in a thin InAs-Al nanowire, revealing zero-bias features and their evolution, advancing understanding of topologically trivial states.

Findings

Large zero-bias peaks of about 2e^2/h observed

Transition between zero-bias peak and dip with gate and magnetic field

Zero-bias conductance remains close to 2e^2/h

Abstract

We report electron transport studies of a thin InAs-Al hybrid semiconductor-superconductor nanowire device using a four-terminal design. Compared to previous works, thinner InAs nanowire (diameter less than 40 nm) is expected to reach fewer sub-band regime. The four-terminal device design excludes electrode contact resistance, an unknown value which has inevitably affected previously reported device conductance. Using tunneling spectroscopy, we find large zero-bias peaks (ZBPs) in differential conductance on the order of $2e^2/h$. Investigating the ZBP evolution by sweeping various gate voltages and magnetic field, we find a transition between a zero-bias peak and a zero-bias dip while the zero-bias conductance sticks close to $2e^2/h$. We discuss a topologically trivial interpretation involving disorder, smooth potential variation and quasi-Majorana zero modes.