OFF-state trapping phenomena in GaN HEMTs: interplay between gate trapping, acceptor ionization and positive charge redistribution

TL;DR

This paper investigates the complex trapping phenomena in GaN HEMTs under drain bias stress, revealing how gate trapping, acceptor ionization, and charge redistribution affect device stability and performance.

Contribution

It provides a detailed analysis of trapping processes at different voltages, identifying the interplay between fast positive charge storage and slower negative charge trapping mechanisms.

Findings

Positive VTH variation at moderate voltages due to gate stack trapping.

Dominance of fast positive charge storage at higher voltages.

Identification of thermally activated negative charge trapping with specific activation energies.

Abstract

We present an extensive analysis of the trapping processes induced by drain bias stress in AlGaN/GaN high-electron-mobility transistors (HEMTs) with p-GaN gate. We demonstrate that: (i) with increasing drain stress, pulsed I-V and VTH measurements shown an initial positive VTH variation and an increase in RON then, for drain voltages >100 V, VTH is stable and the RON shows a partial recovery. (ii) At moderate voltages, VTH instability is related to trapping at the gate stack, due to residual negative charge left behind by the holes that leave the p-GaN layer through the Schottky gate contact and/or to trapping at the barrier. At higher voltages, we demonstrate the interplay of two trapping processes by C-V and pulsed drain current analysis: (iii) a fast storage of positive charge, accumulated near the buffer/SRL interface, not strongly thermally activated, dominating at higher voltages; (iv) a slower negative charge storage, thermally activated with activation energies for trapping and de-trapping equal to ~0.6 eV and ~0.4-0.8 eV, respectively.