CAP-RAM: A Charge-Domain In-Memory Computing 6T-SRAM for Accurate and Precision-Programmable CNN Inference
Zhiyu Chen, Zhanghao Yu, Qing Jin, Yan He, Jingyu Wang, Sheng Lin, Dai, Li, Yanzhi Wang, Kaiyuan Yang

TL;DR
CAP-RAM introduces a charge-domain in-memory computing SRAM macro for energy-efficient, high-accuracy CNN inference with programmable bitwidths, leveraging novel circuitry and architecture for superior linearity and throughput.
Contribution
It presents a novel charge-domain MAC mechanism and a semi-parallel architecture enabling accurate, programmable CNN inference in SRAM with improved energy efficiency.
Findings
Achieves 98.8% accuracy on MNIST with 512x128 macro.
Supports up to six bit-width levels for weights.
Attains 49.4 TOPS/W energy efficiency.
Abstract
A compact, accurate, and bitwidth-programmable in-memory computing (IMC) static random-access memory (SRAM) macro, named CAP-RAM, is presented for energy-efficient convolutional neural network (CNN) inference. It leverages a novel charge-domain multiply-and-accumulate (MAC) mechanism and circuitry to achieve superior linearity under process variations compared to conventional IMC designs. The adopted semi-parallel architecture efficiently stores filters from multiple CNN layers by sharing eight standard 6T SRAM cells with one charge-domain MAC circuit. Moreover, up to six levels of bit-width of weights with two encoding schemes and eight levels of input activations are supported. A 7-bit charge-injection SAR (ciSAR) analog-to-digital converter (ADC) getting rid of sample and hold (S&H) and input/reference buffers further improves the overall energy efficiency and throughput. A 65-nm…
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