Programmable RO (PRO): A Multipurpose Countermeasure against Side-channel and Fault Injection Attack

TL;DR

This paper introduces Programmable Ring Oscillators (PRO) as a versatile, low-cost hardware primitive capable of detecting faults, monitoring power anomalies, and reducing side-channel leakage, thus providing a unified countermeasure against multiple attack vectors.

Contribution

The paper presents a novel, application-independent PRO design that simultaneously addresses fault detection, power anomaly monitoring, and side-channel resistance in hardware security.

Findings

PRO effectively detects on-chip power anomalies in real-time.

PRO reduces side-channel leakage by injecting random noise into power consumption.

Measurement results on FPGA demonstrate low-cost implementation of the countermeasure.

Abstract

Side-channel and fault injection attacks reveal secret information by monitoring or manipulating the physical effects of computations involving secret variables. Circuit-level countermeasures help to deter these attacks, and traditionally such countermeasures have been developed for each attack vector separately. We demonstrate a multipurpose ring oscillator design - Programmable Ring Oscillator (PRO) to address both fault attacks and side-channel attacks in a generic, application-independent manner. PRO, as an integrated primitive, can provide on-chip side-channel resistance, power monitoring, and fault detection capabilities to a secure design. We present a grid of PROs monitoring the on-chip power network to detect anomalies. Such power anomalies may be caused by external factors such as electromagnetic fault injection and power glitches, as well as by internal factors such as hardware Trojans. By monitoring the frequency of the ring oscillators, we are able to detect the on-chip power anomaly in time as well as in location. Moreover, we show that the PROs can also inject a random noise pattern into a design's power consumption. By randomly switching the frequency of a ring oscillator, the resulting power-noise pattern significantly reduces the power-based side-channel leakage of a cipher. We discuss the design of PRO and present measurement results on a Xilinx Spartan-6 FPGA prototype, and we show that side-channel and fault vulnerabilities can be addressed at a low cost by introducing PRO to the design. We conclude that PRO can serve as an application-independent, multipurpose countermeasure.