An Efficient SDN Architecture for Smart Home Security Accelerated by FPGA

TL;DR

This paper presents an FPGA-accelerated SDN architecture for smart home security that significantly improves device classification and malicious traffic detection speed and efficiency.

Contribution

It introduces a novel FPGA-based acceleration of KNN for smart home network security within an SDN framework, achieving high speed and accuracy improvements.

Findings

KNN on FPGA is 78% faster than bubble sort-based implementation.

The FPGA solution classifies with 95% accuracy in 4 ms.

The approach outperforms CPU-based classification by a large margin.

Abstract

With the rise in Internet of Things (IoT) devices, home network management and security are becoming complex. There is an urgent requirement to make smart home network management efficient. This work proposes an SDN-based architecture to secure smart home networks through K-Nearest Neighbor (KNN) based device classifications and malicious traffic detection. The efficiency is further enhanced by offloading the computation-intensive KNN model to Field Programmable Gate Arrays (FPGA), which offers parallel processing power of GPU platforms at lower costs and higher efficiencies, and can be used to accelerate time-sensitive tasks. The proposed parallelization and implementation of KNN on FPGA are achieved by using the Vivado Design Suite from Xilinx and High-Level Synthesis (HLS). When optimized with 10-fold cross-validation, the proposed solution for KNN consistently exhibits the best performances on FPGA when compared with four alternative KNN instances (i.e., 78% faster than the parallel bubble sort-based implementation and 99\% faster than the other three sorting algorithms). Moreover, with 36,225 training samples, the proposed KNN solution classifies a test query with 95% accuracy in approximately 4 milliseconds on FPGA compared to 57 seconds on a CPU platform.