Superconducting quantum computer: a hint for building architectures
Yutaka Tabuchi, Shuhei Tamate, Shinichi Yorozu

TL;DR
This paper explores scalable architectures for superconducting quantum computers, emphasizing wiring reduction through modular design and quantum error correction, proposing a stacked heterogeneous structure to improve scalability.
Contribution
It introduces a novel architecture design incorporating regularity, modularity, and hierarchy, utilizing surface codes and a stacked structure to address wiring challenges.
Findings
Wiring inside cryostats is proportional to qubit count in current architectures.
Surface codes with thresholds enable wiring elimination strategies.
A superconducting-digital-logic-based architecture with a stacked structure is proposed.
Abstract
We discuss the scalability of superconducting quantum computers, especially in a wiring problem. The number of wiring inside a cryostat is almost proportional to the number of qubits in current wiring architectures. We introduce regularity, modularity, and hierarchy to an architecture design of superconducting quantum computers. The key to the wiring elimination is found in the quantum error correction codes having thresholds and spatial translational symmetry, i.e., the surface code. We show a superconducting-digital-logic-based architecture and introduce a stacked heterogeneous structure of the quantum module.
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