Low-Energy and CPA-Resistant Adiabatic CMOS/MTJ Logic for IoT Devices

TL;DR

This paper introduces a hybrid adiabatic-MTJ architecture for IoT devices that significantly reduces energy consumption and enhances security against power analysis attacks, demonstrated through a case study on PRESENT encryption.

Contribution

It presents a novel hybrid adiabatic-MTJ design that achieves low energy consumption and CPA resistance for IoT devices, combining adiabatic logic with spintronic memory.

Findings

64.29% energy savings at 25 MHz for PRESENT encryption

Hybrid architecture resists correlation power analysis attacks

Low-energy, secure IoT device design demonstrated

Abstract

The tremendous growth in the number of Internet of Things (IoT) devices has increased focus on the energy efficiency and security of an IoT device. In this paper, we will present a design level, non-volatile adiabatic architecture for low-energy and Correlation Power Analysis (CPA) resistant IoT devices. IoT devices constructed with CMOS integrated circuits suffer from high dynamic energy and leakage power. To solve this, we look at both adiabatic logic and STT-MTJs (Spin Transfer Torque Magnetic Tunnel Junctions) to reduce both dynamic energy and leakage power. Furthermore, CMOS integrated circuits suffer from side-channel leakage making them insecure against power analysis attacks. We again look to adiabatic logic to design secure circuits with uniform power consumption, thus, defending against power analysis attacks. We have developed a hybrid adiabatic- MTJ architecture using two-phase adiabatic logic. We show that hybrid adiabatic-MTJ circuits are both low energy and secure when compared with CMOS circuits. As a case study, we have constructed one round of PRESENT and have shown energy savings of 64.29% at a frequency of 25 MHz. Furthermore, we have performed a correlation power analysis attack on our proposed design and determined that the key was kept hidden.