SRAM-SUC: Ultra-Low Latency Robust Digital PUF

TL;DR

This paper introduces SRAM-SUC, a novel digital PUF mechanism using internally generated random ciphers within SoC FPGAs, achieving ultra-low latency and high robustness for secure authentication in URLLC applications.

Contribution

It proposes SRAM-SUC, a practical, internally generated digital PUF mechanism with optimized involutive SUCs for SoC FPGAs, significantly reducing latency compared to traditional PUFs.

Findings

SRAM-SUC achieves response times of 2.88/0.72 microseconds at 50/200 MHz.

The method provides ultra-low latency and robust digital PUFs for secure authentication.

Hardware and software implementations validate the effectiveness of SRAM-SUC.

Abstract

Secret Unknown Ciphers (SUC) have been proposed recently as digital clone-resistant functions overcoming some of Physical(ly) Unclonable Functions (PUF) downsides, mainly their inconsistency because of PUFs analog nature. In this paper, we propose a new practical mechanism for creating internally random ciphers in modern volatile and non-volatile SoC FPGAs, coined as SRAM-SUC. Each created random cipher inside a SoC FPGA constitutes a robust digital PUF. This work also presents a class of involutive SUCs, optimized for the targeted SoC FPGA architecture, as sample realization of the concept; it deploys a generated class of involutive 8-bit S-Boxes, that are selected randomly from a defined large set through an internal process inside the SoC FPGA. Hardware and software implementations show that the resulting SRAM-SUC has ultra-low latency compared to well-known PUF-based authentication mechanisms. SRAM-SUC requires only $2.88/0.72 \mu s$ to generate a response for a challenge at 50/200 MHz respectively. This makes SRAM-SUC a promising and appealing solution for Ultra-Reliable Low Latency Communication (URLLC).