The Backpropagation Algorithm Implemented on Spiking Neuromorphic Hardware

TL;DR

This paper presents the first on-chip spiking neural network implementation of the backpropagation algorithm on neuromorphic hardware, demonstrating competitive accuracy and energy efficiency for edge computing applications.

Contribution

It introduces a neuromorphic, spiking backpropagation algorithm implemented on Intel's Loihi processor, enabling low-power, on-chip training of neural networks.

Findings

First fully on-chip spiking backpropagation implementation.

Achieves competitive accuracy on MNIST dataset.

Energy-delay product suitable for edge applications.

Abstract

The capabilities of natural neural systems have inspired new generations of machine learning algorithms as well as neuromorphic very large-scale integrated (VLSI) circuits capable of fast, low-power information processing. However, it has been argued that most modern machine learning algorithms are not neurophysiologically plausible. In particular, the workhorse of modern deep learning, the backpropagation algorithm, has proven difficult to translate to neuromorphic hardware. In this study, we present a neuromorphic, spiking backpropagation algorithm based on synfire-gated dynamical information coordination and processing, implemented on Intel's Loihi neuromorphic research processor. We demonstrate a proof-of-principle three-layer circuit that learns to classify digits from the MNIST dataset. To our knowledge, this is the first work to show a Spiking Neural Network (SNN) implementation of the backpropagation algorithm that is fully on-chip, without a computer in the loop. It is competitive in accuracy with off-chip trained SNNs and achieves an energy-delay product suitable for edge computing. This implementation shows a path for using in-memory, massively parallel neuromorphic processors for low-power, low-latency implementation of modern deep learning applications.