A Compact Model for Scalable MTJ Simulation

TL;DR

This paper introduces a compact, physics-based model for simulating Spin-Transfer Torque Magnetic Tunnel Junctions, enabling scalable and reliable circuit analysis in large VLSI designs with stochastic behavior considerations.

Contribution

It provides a novel Verilog-A compact model for MTJs that incorporates stochastic dynamics and thermal noise effects, suitable for industry-scale VLSI simulations.

Findings

Model validated against OOMMF magnetic simulator

Performance demonstrated on a 1-Mb 28 nm MRAM memory

Addresses scalability and reliability in MTJ circuit simulation

Abstract

This paper presents a physics-based modeling framework for the analysis and transient simulation of circuits containing Spin-Transfer Torque (STT) Magnetic Tunnel Junction (MTJ) devices. The framework provides the tools to analyze the stochastic behavior of MTJs and to generate Verilog-A compact models for their simulation in large VLSI designs, addressing the need for an industry-ready model accounting for real-world reliability and scalability requirements. Device dynamics are described by the Landau-Lifshitz-Gilbert-Slonczewsky (s-LLGS ) stochastic magnetization considering Voltage-Controlled Magnetic Anisotropy (VCMA) and the non-negligible statistical effects caused by thermal noise. Model behavior is validated against the OOMMF magnetic simulator and its performance is characterized on a 1-Mb 28 nm Magnetoresistive-RAM (MRAM) memory product.