Micro BTB: A High Performance and Lightweight Last-Level Branch Target Buffer for Servers
Vishal Gupta (Indian Institute of Technology, Kanpur), Biswabandan, Panda (Indian Institute of Technology, Bombay)

TL;DR
Micro BTB introduces a high-density, lightweight last-level branch target buffer that stores multiple branch targets per entry using branch offsets, significantly improving server workload performance while reducing storage requirements.
Contribution
The paper proposes a novel skewed indexed and compressed last-level BTB design called MicroBTB that increases storage density by storing multiple branches per entry using branch offsets.
Findings
Achieves 17.61% performance improvement over baseline BTB.
Reduces BTB storage by 47.5KB per core.
Effectively handles modern server workload branch prediction challenges.
Abstract
High-performance branch target buffers (BTBs) and the L1I cache are key to high-performance front-end. Modern branch predictors are highly accurate, but with an increase in code footprint in modern-day server workloads, BTB and L1I misses are still frequent. Recent industry trend shows usage of large BTBs (100s of KB per core) that provide performance closer to the ideal BTB along with a decoupled front-end that provides efficient fetch-directed L1I instruction prefetching. On the other hand, techniques proposed by academia, like BTB prefetching and using retire order stream for learning, fail to provide significant performance with modern-day processor cores that are deeper and wider. We solve the problem fundamentally by increasing the storage density of the last-level BTB. We observe that not all branch instructions require a full branch target address. Instead, we can store the…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Advanced Data Storage Technologies · Network Packet Processing and Optimization
