Realization of all logic gates and memory latch in the SC-CNN cell of the simple nonlinear MLC circuit

TL;DR

This paper demonstrates that a nonlinear MLC circuit within the SC-CNN framework can realize all basic logic gates and memory elements, showing potential for hardware simplification and noise tolerance.

Contribution

The study introduces a method to implement all fundamental logic gates and flip-flops using a single nonlinear circuit, expanding the application scope of MLC circuits.

Findings

All basic logic gates are realized in the circuit.

The circuit emulates three-input gates and flip-flops.

Logical elements are noise-tolerant and experimentally validated.

Abstract

We investigate the State-Controlled Cellular Neural Network (SC-CNN) framework of Murali-Lakshmanan-Chua (MLC) circuit system subjected to two logical signals. By exploiting the attractors generated by this circuit in different regions of phase-space, we show that the nonlinear circuit is capable of producing all the logic gates, namely OR, AND, NOR, NAND, Ex-OR and Ex-NOR gates available in digital systems. Further the circuit system emulates three-input gates and Set-Reset flip-flop logic as well. Moreover, all these logical elements and flip-flop are found to be tolerant to noise. These phenomena are also experimentally demonstrated. Thus our investigation to realize all logic gates and memory latch in a nonlinear circuit system paves the way to replace or complement the existing technology with a limited number of hardware.