Measurements and modeling of atomic-scale sidewall roughness and losses in integrated photonic devices

TL;DR

This paper introduces a high-resolution method to measure atomic-scale sidewall roughness in photonic devices and a modified model to predict optical losses based on this roughness, aiding fabrication optimization.

Contribution

It presents a novel atomic force microscopy technique for measuring sidewall roughness and a new Payne-Lacey Bending model for accurate loss prediction in nanophotonic devices.

Findings

High-resolution roughness measurements of silicon nitride waveguides

Comparison of roughness from different fabrication methods

Enhanced loss prediction accuracy with the new bending model

Abstract

Atomic-level imperfections play an increasingly critical role in nanophotonic device performance. However, it remains challenging to accurately characterize the sidewall roughness with sub-nanometer resolution and directly correlate this roughness with device performance. We have developed a method that allows us to measure the sidewall roughness of waveguides made of any material (including dielectrics) using the high resolution of atomic force microscopy. We illustrate this method by measuring state-of-the-art photonic devices made of silicon nitride. We compare the roughness of devices fabricated using both DUV photo-lithography and electron-beam lithography for two different etch processes. To correlate roughness with device performance we describe what we call a new Payne-Lacey Bending model, which adds a correction factor to the widely used Payne-Lacey model so that losses in resonators and waveguides with bends can be accurately predicted given the sidewall roughness, waveguide width and bending radii. Having a better way to measure roughness and use it to predict device performance can allow researchers and engineers to optimize fabrication for state-of-the-art photonics using many materials.