Scaling Theory of Two-Dimensional Field Effect Transistors

TL;DR

This paper develops a scaling theory for 2D FETs, showing that device electrostatics are primarily governed by physical gate oxide thickness for ultra-thin channels, with implications for device design.

Contribution

It introduces a scaling model for 2D FETs, highlighting the dominance of physical gate oxide thickness over other parameters in electrostatics.

Findings

Scale length varies linearly with oxide thickness in symmetric double gate FETs.

Device electrostatics are unaffected by dielectric permittivity or channel thickness in ultra-thin devices.

Theoretical predictions align with scaled monolayer MoS2 FETs.

Abstract

We present a scaling theory of two-dimensional (2D) field effect transistors (FETs). For devices with channel thickness less than 4 nm, the device electrostatics is dominated by the physical gate oxide thickness and not the effective oxide thickness. Specifically, for symmetric double gate (DG) FETs the scale length ({\Lambda}) varies linearly with the gate oxide thickness(t_{ox}) as {\Lambda} ~ 3/4t_{ox}. The gate oxide dielectric permittivity and the semiconductor channel thickness do not affect the device electrostatics for such device geometries. For an asymmetric device such as single gate (SG) FETs, the fringing fields have a second order effect on the scale length. However, like symmetric DG FETs, the scale length in asymmetric FETs is also ultimately limited by the physical gate oxide thickness. We compare our theoretical predictions for scaled monolayer MoS2 DG FETs.