A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization
Mateus Saquetti, Raphael M. Brum, Bruno Zatt, Samuel Pagliarini,, Weverton Cordeiro, Jose R. Azambuja

TL;DR
This paper presents a hybrid FPGA-ASIC platform that enables high-throughput switch virtualization, achieving over 3 Tbps with multiple virtual switches, addressing scalability and flexibility needs of next-generation networks.
Contribution
Introduces a novel hybrid FPGA-ASIC architecture for switch virtualization that supports hot-swapping and high throughput, surpassing existing virtualization solutions.
Findings
Achieves 3.2 Tbps throughput with 26 virtual switches
Supports full and partial FPGA reconfiguration for flexibility
Low resource overhead for virtualization
Abstract
The roll-out of technologies like 5G and the need for multi-terabit bandwidth in backbone networks requires networking companies to make significant investments to keep up with growing service demands. For lower capital expenditure and faster time-to-market, companies can resort to anything-as-a-service providers to lease virtual resources. Nevertheless, existing virtualization technologies are still lagging behind next-generation networks' requirements. This paper breaks the terabit barrier by introducing a hybrid FPGA-ASIC architecture to virtualize programmable forwarding planes. In contrast to existing solutions, our architecture involves an ASIC that multiplexes network flows between programmable virtual switches running in an FPGA capable of full and partial reconfiguration, enabling virtual switch hot-swapping. Our evaluation shows the feasibility of a switch virtualization…
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