Unveiling the impact of the bias-dependent charge neutrality point on graphene-based multi-transistor applications

TL;DR

This paper investigates how bias-dependent charge neutrality points in graphene transistors affect their performance, providing a methodology to control these effects for improved radio-frequency circuit applications.

Contribution

It offers a rigorous approach to understanding and controlling the Dirac point shift in GFETs, enhancing the design of RF circuits with multiple transistors.

Findings

Bias-dependent Dirac point shifts significantly impact device symmetry.

Proper control of the Dirac point improves circuit performance.

Methodology enables optimized deployment of GFET-based RF applications.

Abstract

The Dirac voltage of a graphene field-effect transistor (GFET) stands for the gate bias that sets the charge neutrality condition in the channel, thus resulting in a minimum conductivity. Controlling its dependence on the terminal biases is crucial for the design and optimization of radio-frequency applications based on multiple GFETs. However, the previous analysis of such dependence carried out for a single device can lead to confusion and if not properly understood could result in circuit designs with poor performance. The control of the Dirac point shift (DPS) is particularly important for the deployment of graphene-based differential circuit topologies where keeping a strict symmetry between the electrical balanced branches is crucial for exploiting the advantages of such topologies. This note sheds light on the impact of terminal biases on the DPS in a real device and sets a rigorous methodology to control it so to eventually optimize and exploit the performance of radio-frequency applications based on GFETs.