Quantum Instruction Set Design for Performance

TL;DR

This paper introduces new techniques for characterizing and compiling non-Clifford gates in quantum instruction sets, demonstrating significant fidelity improvements on a fluxonium processor by replacing $ ext{iSWAP}$ with $ ext{SQiSW}$.

Contribution

It develops novel characterization and compilation methods for non-Clifford gates and applies them to enhance quantum instruction set performance on fluxonium hardware.

Findings

Achieved up to 99.72% gate fidelity with $ ext{SQiSW}$

Realized Haar random two-qubit gates with 96.38% fidelity

Error reductions of 41% and 50% compared to $ ext{iSWAP}$

Abstract

A quantum instruction set is where quantum hardware and software meet. We develop new characterization and compilation techniques for non-Clifford gates to accurately evaluate different quantum instruction set designs. We specifically apply them to our fluxonium processor that supports mainstream instruction $\mathrm{iSWAP}$ by calibrating and characterizing its square root $\mathrm{SQiSW}$. We measure a gate fidelity of up to $99.72\%$ with an average of $99.31\%$ and realize Haar random two-qubit gates using $\mathrm{SQiSW}$ with an average fidelity of $96.38\%$. This is an average error reduction of $41\%$ for the former and a $50\%$ reduction for the latter compared to using $\mathrm{iSWAP}$ on the same processor. This shows designing the quantum instruction set consisting of $\mathrm{SQiSW}$ and single-qubit gates on such platforms leads to a performance boost at almost no cost.