Radiation tolerant, thin, passive CMOS sensors read out with the RD53A chip

TL;DR

This study evaluates the radiation tolerance of thin passive CMOS pixel sensors in 150 nm technology, demonstrating high efficiency and low noise after high-level irradiation when read out with the RD53A chip.

Contribution

It presents the first comprehensive assessment of radiation hardness for passive CMOS sensors in 150 nm technology using the RD53A readout.

Findings

>99% hit-detection efficiency after high fluence irradiation

Equivalent noise charge comparable to traditional sensors

Suitable for radiation-intensive environments like LHC upgrades

Abstract

The radiation hardness of passive CMOS pixel sensors fabricated in 150 nm LFoundry technology is investigated. CMOS process lines are especially of interest for large-scale silicon detectors as they offer high production throughput at comparatively low cost. Moreover, several features like poly-silicon resistors, MIM-capacitors and several metal layers are available which can help enhance the sensor design. The performance of a 100 $\mathrm{\mu}$m thin passive CMOS sensor with a pixel pitch of 50 $\mathrm{\mu}$m at different irradiation levels, 5 $\times$ 10$^{15}$n$_{\mathrm{eq}}$cm$^{-2}$ and 1 $\times$ 10$^{16}$n$_{\mathrm{eq}}$cm$^{-2}$, is presented. The sensor was bump-bonded and read out using the RD53A readout chip. After the highest fluence a hit-detection efficiency larger than 99% is measured for minimum ionising particles. The measured equivalent noise charge is comparable to conventional planar pixel sensors. Passive CMOS sensors are thus an attractive option for silicon detectors operating in radiation harsh environments like the upgrades for the LHC experiments.