Control Design for Inverters: Beyond Steady-State Droop Laws

TL;DR

This paper introduces a new control design for inverters that surpasses traditional droop laws by improving bandwidth, stability, and transient response through a novel control synthesis based on disturbance rejection and current-to-power mapping.

Contribution

It formulates the droop method as a feedback control problem, introduces a current-based proxy for power, and develops a generalized control synthesis framework with experimental validation.

Findings

Higher bandwidth and improved transient performance achieved.

Inherent droop-like characteristics demonstrated in specific line conditions.

Generalized control framework applicable to complex line models.

Abstract

This paper presents a novel control structure and control synthesis method for regulating the output voltage/frequency and power injection of DC-AC inverters. The traditional droop method offers attractive solution to achieve compromise between clashing power and voltage/frequency regulation objectives. However, it relies on use of nonlinear power variables through slow outer control loop. In this paper we formulate the traditional droop method as a feedback control problem based on static power-flow equations and show how neglecting the dynamics of inverter and transmission line restricts the attainable closed-loop bandwidth and stability and robustness margin. Then we introduce a mapping between power variables and current in $dq$ frame under given PLL condition, allowing for replacing the fast acting current variables as a proxy for power. Consequently, we present a novel control structure and control synthesis method based on disturbance rejection framework, and demonstrate inherent droop like characteristics in underlying dynamics for special cases of resistive and inductive line. Moreover, we generalize the proposed control synthesis procedure to include a generalized complex line dynamical model and introduce concept of hybrid-sourced-intverter. Finally, we validate higher bandwidth and better transient performance of our proposed design through experimental validation.