First Demonstration of Robust Tri-Gate \b{eta}-Ga2O3 Nano-membrane Field-Effect Transistors Operated Up to 400 {\deg}C
Hagyoul Bae, Tae Joon Park, Jinhyun Noh, Wonil Chung, Mengwei Si,, Shriram Ramanathan, and Peide D. Ye

TL;DR
This paper reports the first fabrication and demonstration of nano-membrane tri-gate beta-Ga2O3 FETs on SiO2/Si substrates, showing high performance and operation stability up to 400°C.
Contribution
It introduces a novel fabrication of tri-gate beta-Ga2O3 FETs with high-temperature robustness and detailed interface engineering.
Findings
Achieved subthreshold slope of 61 mV/dec
Demonstrated operation at temperatures up to 400°C
High ON/OFF current ratio of 1.5 x 10^9
Abstract
Nano-membrane tri-gate beta-gallium oxide (\b{eta}-Ga2O3) field-effect transistors (FETs) on SiO2/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized features can be defined with a 50 nm fin structure. For high-quality interface between \b{eta}-Ga2O3 and gate dielectric, atomic layer-deposited 15-nm-thick aluminum oxide (Al2O3) was utilized with Tri-methyl-aluminum (TMA) self-cleaning surface treatment. The fabricated devices demonstrate extremely low subthreshold slope (SS) of 61 mV/dec, high drain current (IDS) ON/OFF ratio of 1.5 X 109, and negligible transfer characteristic hysteresis. We also experimentally demonstrated robustness of these devices with current-voltage (I-V) characteristics measured at temperatures up to 400 {\deg}C.
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