A Power and Area Efficient Lepton Hardware Encoder with Hash-based Memory Optimization

TL;DR

This paper presents the first hardware implementation of Lepton, a lossless JPEG compression algorithm, achieving significant reductions in area, power, and energy consumption through hash-based memory optimization.

Contribution

It introduces a novel hash function and memory architecture that significantly improves Lepton's hardware efficiency and throughput.

Findings

Area of probability models reduced by 70.97%

Throughput increased by 55.25 times

Energy efficiency improved by 4899 times

Abstract

Although it has been surpassed by many subsequent coding standards, JPEG occupies a large share of the storage load of the current data hosting service. To reduce the storage costs, DropBox proposed a lossless secondary compression algorithm, Lepton, to further improve the compression rate of JPEG images. However, the bloated probability models defined by Lepton severely restrict its throughput and energy efficiency. To solve this problem, we construct an efficient access probability-based hash function for the probability models, and then propose a hardware-friendly memory optimization method by combining the proposed hash function and the N-way Set-Associative unit. After that, we design a highly parameterized hardware structure for the probability models and finally implement a power and area efficient Lepton hardware encoder. To the best of our knowledge, this is the first hardware implementation of Lepton. The synthesis result shows that the proposed hardware structure reduces the total area of the probability models by 70.97%. Compared with DropBox's software solution, the throughput and the energy efficiency of the proposed Lepton hardware encoder are increased by 55.25 and 4899 times respectively. In terms of manufacturing cost, the proposed Lepton hardware encoder is also significantly lower than the general-purpose CPU used by DropBox.