A Compact Model for SiC Power MOSFETs for Large Current and High Voltage Operation

TL;DR

This paper introduces a physics-based compact model for SiC power MOSFETs that accurately predicts their behavior under high voltage and current conditions, incorporating interface trap effects and temperature dependence.

Contribution

The work presents a novel charge-based compact model specifically for SiC power MOSFETs, accounting for interface traps and temperature effects, improving accuracy in high voltage and current regimes.

Findings

Model accurately fits measurement data across wide IV range

Effectively captures interface trap influence on device behavior

Applicable to high voltage and high current operation

Abstract

This work presents a physics based compact model for SiC power MOSFETs that accurately describes the I-V characteristics up to large voltages and currents. Charge-based formulations accounting for the different physics of SiC power MOSFETs are presented. The formulations account for the effect of the large SiC/SiO2 interface traps density characteristic of SiC MOSFETs and its dependence with temperature. The modeling of interface charge density is found to be necessary to describe the electrostatics of SiC power MOSFETs when operating at simultaneous high current and high voltage regions. The proposed compact model accurately fits the measurement data extracted of a 160 milli ohms, 1200V SiC power MOSFET in the complete IV plane from drain-voltage $V_d$ = 5mV up to 800 V and current ranges from few mA to 30 A.