Double Step Annealing for the Recovering of Ion Implantation Defectiveness in 4H-SiC DIMOSFET

TL;DR

This paper investigates a double step annealing process at high temperatures to effectively reduce defects and improve crystal quality in ion-implanted 4H-SiC DIMOSFETs, enhancing device performance.

Contribution

It introduces a specific double step annealing protocol that significantly improves defect healing in 4H-SiC DIMOSFETs compared to traditional methods.

Findings

High temperature annealing (1750°C, 1h) followed by lower temperature annealing (1500°C, 4h) reduces defect concentration.

The process results in better crystal quality in both n- and p-type regions.

Enhanced defect healing improves the overall device quality.

Abstract

Thermal annealing plays a crucial role for healing the defectiveness in the ion implanted regions of DIMOSFETs (Double Implanted MOSFETs) devices. In this work, we have studied the effect of a double step annealing on the body (Al implanted) and the source (P implanted) regions of such devices. We found that a high temperature annealing (1750{\deg}C, 1h) followed by a lower temperature one (1500{\deg}C, 4h) is mandatory to achieve low defects concentration and good crystal quality in both the n- and p- type zones of the device.