Hot Carrier Degradation in MOSFETs at Cryogenic Temperatures Down to 4.2 K

TL;DR

This study investigates hot carrier degradation in 0.18 um CMOS devices at cryogenic temperatures down to 4.2 K, revealing reliability challenges for NMOS transistors and predicting device lifetime under various conditions.

Contribution

It provides new insights into HCD behavior at cryogenic temperatures and predicts device lifetime, highlighting the impact of substrate bias and current overshoot phenomena.

Findings

Cryogenic NMOS cannot meet 10-year lifetime standard at standard VDD.

Reliability can be achieved with VDD below 1.768V at 77K and 1.734V at 4.2K.

PMOS devices have sufficiently long lifetime even at low temperatures.

Abstract

Wide attention has been focused on cryogenic CMOS (Cryo-CMOS) operation because of its wide application and the improvement of CMOS performance. However, hot carrier degradation (HCD) becomes worsening at cryogenic temperature, which affects the reliability of Cryo-CMOS. Therefore, this article investigates HCD in 0.18 um bulk CMOS at cryogenic temperature down to 4.2 K. Particularly, the relationship between HCD and the current overshoot phenomenon and the influence of substrate bias on HCD are discussed. Besides, we predict the lifetime of the device at 77 K and 4.2 K. It is concluded that cryogenic NMOS cannot reach the ten years' commercial standard lifetime at standard drain voltage (VDD). And it is predicted that the reliability requirements can be reached when VDD<1.768V/1.734V at 77K/4.2K. Differently, the lifetime of PMOS is long enough even at low temperatures.