Uncovering Phase Change Memory Energy Limits by Sub-Nanosecond Probing of Power Dissipation Dynamics

TL;DR

This study demonstrates that by using sub-nanosecond pulses, the reset energy in phase change memory can be drastically reduced due to thermal confinement, enabling more energy-efficient PCM devices.

Contribution

The paper introduces a high-speed measurement approach to analyze PCM energy dissipation at sub-nanosecond scales, revealing thermal confinement effects that lower reset energy.

Findings

Reset energy can be reduced by nearly two orders of magnitude with short pulses.

Thermal confinement occurs when pulse width is less than 1 ns, maintaining switching power.

Reset energy density achieved is below 0.1 nJ/μm², surpassing current PCM performance.

Abstract

Phase change memory (PCM) is one of the leading candidates for neuromorphic hardware and has recently matured as a storage class memory. Yet, energy and power consumption remain key challenges for this technology because part of the PCM device must be self-heated to its melting temperature during reset. Here, we show that this reset energy can be reduced by nearly two orders of magnitude by minimizing the pulse width. We utilize a high-speed measurement setup to probe the energy consumption in PCM cells with varying pulse width (0.3 to 40 nanoseconds) and uncover the power dissipation dynamics. A key finding is that the switching power (P) remains unchanged for pulses wider than a short thermal time constant of the PCM ($\tau$$_t$$_h$ < 1 ns in 50 nm diameter device), resulting in a decrease of energy (E=P$\tau$) as the pulse width $\tau$ is reduced in that range. In other words, thermal confinement during short pulses is achieved by limiting the heat diffusion time. Our improved programming scheme reduces reset energy density below 0.1 nJ/$\mu$m$^2$, over an order of magnitude lower than state-of-the-art PCM, potentially changing the roadmap of future data storage technology and paving the way towards energy-efficient neuromorphic hardware