A Composable Glitch-Aware Delay Model

TL;DR

The paper presents the CIDM, an improved delay model for digital simulation that enhances flexibility, modeling power, and retains accuracy, addressing limitations of the previous IDM approach.

Contribution

It introduces the CIDM, a composable and glitch-aware delay model that simplifies characterization and captures complex circuit behaviors while maintaining faithfulness.

Findings

CIDM reduces characterization effort.

CIDM improves modeling of glitch propagation.

CIDM retains IDM's faithfulness despite enhancements.

Abstract

We introduce the Composable Involution Delay Model (CIDM) for fast and accurate digital simulation. It is based on the Involution Delay Model (IDM) [F\"ugger et al., IEEE TCAD 2020], which has been shown to be the only existing candidate for faithful glitch propagation known so far. In its present form, however, it has shortcomings that limit its practical applicability and utility. First, IDM delay predictions are conceptually based on discretizing the analog signal waveforms using specific matching input and output discretization threshold voltages. Unfortunately, they are difficult to determine and typically different for interconnected gates. Second, metastability and high-frequency oscillations in a real circuit could be invisible in the IDM signal predictions. Our CIDM reduces the characterization effort by allowing independent discretization thresholds, improves composability and increases the modeling power by exposing canceled pulse trains at the gate interconnect. We formally show that, despite these improvements, the CIDM still retains the IDM's faithfulness, which is a consequence of the mathematical properties of involution delay functions.