Voltage-Gate Assisted Spin-Orbit Torque Magnetic Random Access Memory for High-Density and Low-Power Embedded Application

TL;DR

This paper demonstrates voltage-gate assisted spin-orbit torque MRAM that achieves high-density, low-power, and high-speed operation by combining VCMA and SOT effects, with detailed electrical characterization and device scaling insights.

Contribution

It introduces a comprehensive methodology for electrical characterization of VGSOT writing in pMTJ devices and shows how gate voltage reduces write current and energy, enabling scalable, efficient MRAM.

Findings

VGSOT reduces SOT write current by 25% at 1V gate voltage.

VCMA coefficient ({}) is consistent across methods and independent of speed and gate length.

Device scaling benefits from VGSOT scheme, enabling high-density, low-power MRAM applications.

Abstract

Voltage-gate assisted spin-orbit torque (VGSOT) writing scheme combines the advantages from voltage control of magnetic anisotropy (VCMA) and spin-orbit torque (SOT) effects, enabling multiple benefits for magnetic random access memory (MRAM) applications. In this work, we give a complete description of VGSOT writing properties on perpendicular magnetic tunnel junction (pMTJ) devices, and we propose a detailed methodology for its electrical characterization. The impact of gate assistance on the SOT switching characteristics are investigated using electrical pulses down to 400ps. The VCMA coefficient ({\xi}) extracted from current switching scheme is found to be the same as that from the magnetic field switch method, which is in the order of 15fJ/Vm for the 80nm to 150nm devices. Moreover, as expected from the pure electronic VCMA effect, {\xi} is revealed to be independent of the writing speed and gate length. We observe that SOT switching current characteristics are modified linearly with gate voltage (V_g), similar as for the magnetic properties. We interpret this linear behavior as the direct modification of perpendicular magnetic anisotropy (PMA) and nucleation energy induced by VCMA. At V_g = 1V, the SOT write current is decreased by 25%, corresponding to a 45% reduction in total energy down to 30fJ/bit at 400ps speed for the 80nm devices used in this study. Further, the device-scaling criteria are proposed, and we reveal that VGSOT scheme is of great interest as it can mitigate the complex material requirements of achieving high SOT and VCMA parameters for scaled MTJs. Finally, how that VGSOT-MRAM can enable high-density arrays close to two terminal geometries, with high-speed performance and low-power operation, showing great potential for embedded memories as well as in-memory computing applications at advanced technology nodes.