Measurement and Data-Assisted Simulation of Bit Error Rate in RQL Circuits

TL;DR

This paper presents a data-assisted simulation method to accurately predict the thermally-induced bit error rate in RQL superconducting circuits, incorporating measurement data to improve prediction accuracy.

Contribution

It introduces a novel simulation approach that combines circuit modeling with measurement data to evaluate bit error rates in RQL logic circuits.

Findings

Effective noise bandwidth is 6-23% of junction plasma frequency.

Measured bit error rates are significantly lower than simplistic estimates.

Effective critical current in distributed networks is about three times that of individual junctions.

Abstract

A circuit-simulation-based method is used to determine the thermally-induced bit error rate of superconducting logic circuits. Simulations are used to evaluate the multidimensional Gaussian integral across noise current sources attached to the active devices. The method is data-assisted and has predictive power. Measurement determines the value of a single parameter, effective noise bandwidth, for each error mechanism. The errors in the distributed networks of comparator-free RQL logic nucleate across multiple Josephson junctions, so the effective critical current is about three times that of the individual devices. The effective noise bandwidth is only 6-23% of the junction plasma frequency at a modest clock rate of 3.4GHz, which is 1% of the plasma frequency. This analysis shows the ways measured bit error rate comes out so much lower than simplistic estimates based on isolated devices.