Staircase Selective Harmonic Elimination in Multilevel Inverters to Achieve Wide Output Voltage Range

TL;DR

This paper introduces a method to improve the output voltage quality of multilevel inverters at low modulation indexes by adjusting the DC voltage, verified through simulations on a 7-level CHB inverter using SHE and PSO.

Contribution

It proposes a novel approach to enhance harmonic elimination in MLIs by dynamically adjusting the DC voltage at low modulation indexes.

Findings

Improved output voltage quality at low modulation indexes.

Effective harmonic suppression demonstrated with PSO-based SHE.

Enhanced inverter performance across a wider voltage range.

Abstract

Multilevel inverters (MLIs) are popular because of their advantages such as improved output voltage quality, lower switching losses, low EMI, and ability to handle higher voltage and power levels. To generate the desired output voltage in the MLIs, there are different switching methods including multicarrier pulse-width modulation (PWM), selective harmonic elimination (SHE), and multilevel space-vector PWM (SVPWM) methods. The SHE method minimizes the number of switching and hence the switching losses. Also, the method eliminates or attenuates specified low-order harmonics and adjusts the fundamental output voltage to the desired value. However, problems arise in the low modulation indexes where the harmonic distortion of the output voltage increases considerably. To solve the problem, this paper proposes a method to adjust the DC voltage when the low output voltage is required. Therefore, the modulation index will increase and the output voltage quality will be improved. The proposed method is verified on a 7-level Cascaded H-Bridge (CHB) inverter using the SHE method solved by particle swarm optimization (PSO) algorithm.