3D Wireless Channel Modeling for Multi-layer Network on Chip
Chao Ren, Jingze Hou, Biao Pan

TL;DR
This paper introduces novel 3D wireless channel models for multi-layer network on chip systems, enabling efficient and accurate characterization of complex wireless paths with minimal computational cost.
Contribution
It proposes boundary-less and boundary-constrained 3DWiNoC models with an efficient approximation algorithm for accurate channel gain estimation in multi-layer chips.
Findings
Difference rate between models is below 0.001% for 20 layers.
Channel gain decreases sharply with increased refract time.
Approximate algorithm achieves error rate below 0.1%."
Abstract
The resource constraints and accuracy requirements for Internet of Things (IoT) memory chips need three-dimensional (3D) monolithic integrated circuits, of which the increasing stack layers (currently more than 176) also cause excessive energy consumption and increasing wire length. In this paper, a novel 3D wireless network on chips (3DWiNoCs) model transmitting signal directly to the destination in arbitrary layer is proposed and characterized. However, due to the the reflection and refraction characteristics in each layer, the complex and diverse wireless paths in 3DWiNoC add great difficulty to the channel characterization. To facilitate the modeling in massive layer NoC situation, both boundary-less model boundary-constrained 3DWiNoC model are proposed, of which the channel gain can be obtained by a computational efficient approximate algorithm. These 3DWiNoC models with…
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Taxonomy
TopicsDielectric materials and actuators · Synthesis and properties of polymers · Interconnection Networks and Systems
