On Performance Loss of DOA Measurement Using Massive MIMO Receiver with Mixed-ADCs

TL;DR

This paper investigates the impact of mixed-ADC architectures on DOA estimation in massive MIMO systems, deriving bounds and showing that low-resolution ADCs can maintain satisfactory performance while reducing costs.

Contribution

It derives the CRLB for mixed-ADC architectures in DOA estimation and introduces performance and energy efficiency factors, highlighting the viability of low-resolution ADCs.

Findings

Mixed-ADC architecture balances performance loss and energy efficiency.

Up to 4-bit ADCs can achieve satisfactory DOA estimation performance.

Performance loss is quantifiable through derived bounds.

Abstract

High hardware cost and high power consumption of massive multiple-input and multiple output (MIMO) are two challenges for the future wireless communications including beyond fifth generation (B5G) and sixth generation (6G). Adopting the low-resolution analog-to-digital converter (ADC) is viewed as a promising solution. Additionally, the direction of arrival (DOA) estimation is an indispensable technology for beam alignment and tracking in massive MIMO systems. Thus, in this paper, the performance of DOA estimation with mixed-ADC structure is firstly investigated. The Cramer-Rao lower bound (CRLB) for this architecture is derived based on the additive quantization noise model. Eventually, a performance loss factor and the associated energy efficiency factor is defined for analysis in detail. Simulation results show that the mixed-ADC architecture can strike a good balance among performance loss, circuit cost and energy efficiency. More importantly, just a few bits (up to 4 bits) of low-resolution ADCs can achieve a satisfactory performance for DOA measurement.