High-Level Synthesis of Security Properties via Software-Level Abstractions

TL;DR

This paper explores how high-level synthesis can incorporate security properties, specifically dynamic information flow tracking, by leveraging software-level abstractions to streamline hardware security integration.

Contribution

It introduces a method to abstract security properties at the software level for integration into hardware accelerators via high-level synthesis.

Findings

Efficiently uses software abstractions to hide implementation details.

Demonstrates integration of security properties in hardware synthesis.

Enhances security feature development for hardware accelerators.

Abstract

High-level synthesis (HLS) is a key component for the hardware acceleration of applications, especially thanks to the diffusion of reconfigurable devices in many domains, from data centers to edge devices. HLS reduces development times by allowing designers to raise the abstraction level and use automated methods for hardware generation. Since security concerns are becoming more and more relevant for data-intensive applications, we investigate how to abstract security properties and use HLS for their integration with the accelerator functionality. We use the case of dynamic information flow tracking, showing how classic software-level abstractions can be efficiently used to hide implementation details to the designers.