Flexible Instruction-Set Semantics via Type Classes

TL;DR

This paper introduces a flexible approach to formal instruction-set semantics using Haskell type classes, enabling reuse across various tools like testing, proof, and model checking for RISC-V.

Contribution

It presents a novel method of defining instruction-set semantics as first-class objects via Haskell type classes, facilitating sharing and reuse across different formal tools.

Findings

Supported testing, proof, and model checking with a single semantics

Enabled sharing of theorems across different applications

Demonstrated flexibility with RISC-V instruction set

Abstract

Instruction sets, from families like x86 and ARM, are at the center of many ambitious formal-methods projects. Many verification, synthesis, programming, and debugging tools rely on formal semantics of instruction sets, but different tools can use semantics in rather different ways. As a result, a central challenge for that community is how semantics should be written and what techniques should be used to connect them to new use cases. The best-known work applying single semantics across quite-different tools relies on domain-specific languages like Sail, where the language and its translation tools are specialized to the realm of instruction sets. We decided to explore a different approach, with semantics written in a carefully chosen subset of Haskell. This style does not depend on any new language translators, relying instead on parameterization of semantics over type-class instances. As a result, a semantics can be a first-class object within a logic, and application of a semantics for a new kind of tool can be a first-class operation in the logic, allowing sharing of theorems across applications. Our case study is for the open RISC-V instruction-set family, and we have used a single core semantics to support testing, interactive proof, and model checking of both software and hardware. We especially highlight an application of a first-class semantics within Coq that can be instantiated in different ways within one proof: simulation between variants where multiplication is implemented in hardware or in the machine code of a particular software trap handler.