Topology Design for GNSSs Considering Both Inter-satellite Links and Ground-satellite Links

TL;DR

This paper addresses the joint topology design of inter-satellite and ground-satellite links in GNSSs, proposing optimization and heuristic methods to minimize data delivery delay while ensuring orbit determination accuracy.

Contribution

It formulates the topology design as an integer linear programming problem and introduces a novel delay modeling method and a maximum weight matching heuristic for efficient solutions.

Findings

Heuristic method achieves similar delay performance as optimization with less complexity.

Proposed methods are feasible for practical GNSS operations.

Simulation results validate the effectiveness of the approaches.

Abstract

Inter-satellite links (ISLs) are adopted in global navigation satellite systems (GNSSs) for high-precision orbit determination and space-based end-to-end telemetry telecommand control and communications. Due to limited onboard ISL terminals, the polling time division duplex (PTDD) mechanism is usually proposed for space link layer networking. By extending the polling mechanism to ground-satellite links (GSLs), a unified management system of the space segment and the ground segment can be realized. However, under the polling system how to jointly design the topology of ISLs and GSLs during every slot to improve data interaction has not been studied. In this paper, we formulate the topology design problem as an integer linear programming, aiming at minimizing the average delay of data delivery from satellites to ground stations while satisfying the ranging requirement for the orbit determination. To tackle the computational complexity problem, we first present a novel modeling method of delay to reduce the number of decision variables. Further, we propose a more efficient heuristic based on maximum weight matching algorithms. Simulation results demonstrate the feasibility of the proposed methods for practical operation in GNSSs. Comparing the two methods, the heuristic can achieve similar performance with respect to average delay but with significantly less complexity.