Solving Large Top-K Graph Eigenproblems with a Memory and Compute-optimized FPGA Design

TL;DR

This paper presents a hardware-optimized FPGA algorithm for efficiently computing the Top-K eigenvalues and eigenvectors of large sparse matrices, significantly improving speed and power efficiency over CPU-based methods.

Contribution

The work introduces a novel FPGA-based hardware design that accelerates Top-K eigenproblem solutions for large graphs using memory and compute optimizations.

Findings

6.22x faster than ARPACK on CPU

49x better power efficiency

High accuracy maintained

Abstract

Large-scale eigenvalue computations on sparse matrices are a key component of graph analytics techniques based on spectral methods. In such applications, an exhaustive computation of all eigenvalues and eigenvectors is impractical and unnecessary, as spectral methods can retrieve the relevant properties of enormous graphs using just the eigenvectors associated with the Top-K largest eigenvalues. In this work, we propose a hardware-optimized algorithm to approximate a solution to the Top-K eigenproblem on sparse matrices representing large graph topologies. We prototype our algorithm through a custom FPGA hardware design that exploits HBM, Systolic Architectures, and mixed-precision arithmetic. We achieve a speedup of 6.22x compared to the highly optimized ARPACK library running on an 80-thread CPU, while keeping high accuracy and 49x better power efficiency.