A context-aware gate set tomography characterization of superconducting qubits

TL;DR

This paper introduces a context-aware gate set tomography protocol for superconducting qubits, enabling highly accurate characterization of errors, including crosstalk and memory effects, which are crucial for improving quantum device performance.

Contribution

The work develops a novel, context-aware GST protocol that incorporates error accumulation and context-dependent errors, advancing quantum characterization methods.

Findings

Achieves characterization accuracy of 10^{-5} in simulations

Detects and quantifies crosstalk and memory effects in superconducting qubits

Reveals large coherence in errors when context-awareness is included

Abstract

The efficiency of Quantum Characterisation, Verification, and Validation (QCVV) protocols highly hinges on the agreement between the assumed noise model and the underlying error mechanisms. As a matter of fact, errors in Quantum Processing Units (QPUs) incorporate various aspects of context-dependability which are overlooked by the majority of the commonly used QCVV protocols. As QCVV protocols are indispensable when it comes to characterizing and evaluating quantum operations, there is a serious need for a detailed characterization taking into account such aspects. In this work, we address these shortcomings by designing a context-aware version of the gate set tomography (GST) protocol. Our experiment selection approach is based on a polynomial quantification of the accumulation of errors within the designed circuits. Using simulated QPUs, we show that this technique enables a characterization with an inaccuracy reaching $10^{-5}$. Furthermore, we use our proposed protocol to experimentally infer context-dependent errors, namely crosstalk and memory effects, in a publicly accessible cloud-based superconducting qubits platform. Our results show that when the GST is upgraded to include such features of context-awareness, a large coherence in the errors is observed. These findings open up possibilities of drastically reducing the errors within the currently demonstrated QPUs.