Binary Operations on Neuromorphic Hardware with Application to Linear Algebraic Operations and Stochastic Equations
Oleksandr Iaroshenko, Andrew T. Sornborger

TL;DR
This paper introduces neuromorphic hardware mechanisms for binary operations, enabling efficient matrix multiplication and stochastic simulations, which are crucial for power-efficient computing in autonomous systems.
Contribution
The paper presents novel neuromorphic binary computation methods, including matrix multiplication and stochastic circuits, improving efficiency over traditional unary encoding.
Findings
Binary neuromorphic operations enable efficient matrix multiplication.
The proposed circuits scale favorably with size and iterations.
Applications include differential equations and Brownian motion simulations.
Abstract
Non-von Neumann computational hardware, based on neuron-inspired, non-linear elements connected via linear, weighted synapses -- so-called neuromorphic systems -- is a viable computational substrate. Since neuromorphic systems have been shown to use less power than CPUs for many applications, they are of potential use in autonomous systems such as robots, drones, and satellites, for which power resources are at a premium. The power used by neuromorphic systems is approximately proportional to the number of spiking events produced by neurons on-chip. However, typical information encoding on these chips is in the form of firing rates that unarily encode information. That is, the number of spikes generated by a neuron is meant to be proportional to an encoded value used in a computation or algorithm. Unary encoding is less efficient (produces more spikes) than binary encoding. For this…
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