Exploring the Mysteries of System-Level Test
Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi and, Krishnendu Chakrabarty, Nourhan ElHamawy, Matthias Sauer, Adit Singh, and Matteo Sonza Reorda, Stefan Wagner

TL;DR
This paper reviews system-level testing in integrated circuits, discussing its purpose, challenges, and current knowledge gaps, and proposes future research directions inspired by software engineering.
Contribution
It consolidates existing knowledge on system-level test, highlights its complexities and costs, and suggests new research directions based on recent software engineering insights.
Findings
SLT covers various failure types and requires complex quality assessment.
Current theoretical understanding of SLT is less mature than traditional testing methods.
The paper proposes leveraging software engineering findings to improve SLT methods.
Abstract
System-level test, or SLT, is an increasingly important process step in today's integrated circuit testing flows. Broadly speaking, SLT aims at executing functional workloads in operational modes. In this paper, we consolidate available knowledge about what SLT is precisely and why it is used despite its considerable costs and complexities. We discuss the types or failures covered by SLT, and outline approaches to quality assessment, test generation and root-cause diagnosis in the context of SLT. Observing that the theoretical understanding for all these questions has not yet reached the level of maturity of the more conventional structural and functional test methods, we outline new and promising directions for methodical developments leveraging on recent findings from software engineering.
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