Randomized Benchmarking with Stabilizer Verification and Gate Synthesis
Ellen Derbyshire, Rawad Mezher, Theodoros Kapourniotis, Elham Kashefi

TL;DR
This paper introduces modified randomized benchmarking techniques tailored for NISQ devices, incorporating quantum verification and gate synthesis to better evaluate both Clifford and non-Clifford gates under hardware constraints.
Contribution
It presents a novel RB approach that removes inverse operator assumptions and integrates quantum verification, along with a method for characterizing non-Clifford gates using gate synthesis.
Findings
Acceptance probability from quantum verification as a new figure of merit
Effective characterization of non-Clifford gates
Enhanced benchmarking suited for low-error NISQ devices
Abstract
Recently, there has been an emergence of useful applications for noisy intermediate-scale quantum (NISQ) devices notably, though not exclusively, in the fields of quantum machine learning and variational quantum algorithms. In such applications, circuits of various depths and composed of different sets of gates are run on NISQ devices. Therefore, it is crucial to find practical ways to capture the general performance of circuits on these devices. Motivated by this pressing need, we modified the standard Clifford randomized benchmarking (RB) and interleaved RB schemes targeting them to hardware limitations. Firstly we remove the requirement for, and assumptions on, the inverse operator, in Clifford RB by incorporating a tehchnique from quantum verification. This introduces another figure of merit by which to assess the quality of the NISQ hardware, namely the acceptance probability of…
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Taxonomy
TopicsQuantum Computing Algorithms and Architecture · Low-power high-performance VLSI design · Advancements in Semiconductor Devices and Circuit Design
