An FPGA Implementation of Convolutional Spiking Neural Networks for Radioisotope Identification

TL;DR

This paper presents an FPGA-based implementation of convolutional spiking neural networks optimized for low-power radioisotope identification, achieving high accuracy and low power consumption.

Contribution

It introduces a novel FPGA implementation methodology for CSNNs and demonstrates its application to radioisotope identification with validated chip performance.

Findings

Power consumption of 75 mW achieved

Inference accuracy of 90.62% on synthetic data

Validated FPGA implementation with chip testing

Abstract

This paper details the FPGA implementation methodology for Convolutional Spiking Neural Networks (CSNN) and applies this methodology to low-power radioisotope identification using high-resolution data. Power consumption of 75 mW has been achieved on an FPGA implementation of a CSNN, with an inference accuracy of 90.62% on a synthetic dataset. The chip validation method is presented. Prototyping was accelerated by evaluating SNN parameters using SpiNNaker neuromorphic platform.