FAST: FPGA-based Subgraph Matching on Massive Graphs
Xin Jin, Zhengyi Yang, Xuemin Lin, Shiyu Yang, Lu Qin, You Peng

TL;DR
This paper introduces FAST, an FPGA-based framework for scalable subgraph matching on large graphs, achieving significant speedups and enabling processing of billion-scale graphs on a single machine.
Contribution
It presents a novel CPU-FPGA co-designed framework with a new auxiliary data structure and FPGA algorithm, enabling efficient large-scale subgraph matching.
Findings
Up to 462x speedup over state-of-the-art algorithms.
Able to handle billion-scale graphs on a single machine.
Achieves massive parallelism and efficient memory utilization on FPGA.
Abstract
Subgraph matching is a basic operation widely used in many applications. However, due to its NP-hardness and the explosive growth of graph data, it is challenging to compute subgraph matching, especially in large graphs. In this paper, we aim at scaling up subgraph matching on a single machine using FPGAs. Specifically, we propose a CPU-FPGA co-designed framework. On the CPU side, we first develop a novel auxiliary data structure called candidate search tree (CST) which serves as a complete search space of subgraph matching. CST can be partitioned and fully loaded into FPGAs' on-chip memory. Then, a workload estimation technique is proposed to balance the load between the CPU and FPGA. On the FPGA side, we design and implement the first FPGA-based subgraph matching algorithm, called FAST. To take full advantage of the pipeline mechanism on FPGAs, task parallelism optimization and task…
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Taxonomy
TopicsGraph Theory and Algorithms · Advanced Graph Neural Networks · Interconnection Networks and Systems
