DeepScaleTool : A Tool for the Accurate Estimation of Technology Scaling in the Deep-Submicron Era

TL;DR

DeepScaleTool provides a highly accurate estimation method for deep-submicron CMOS scaling, improving upon traditional models by fitting published data for parameters like area, delay, and energy from 130nm to 7nm technology nodes.

Contribution

The paper introduces DeepScaleTool, a novel tool that models and fits published fabrication data to accurately estimate deep-submicron technology scaling parameters.

Findings

Achieves 1.7% error in area estimation

Achieves 2.5% error in delay estimation

Achieves 5% error in power estimation

Abstract

The estimation of classical CMOS "constant-field" or "Dennard" scaling methods that define scaling factors for various dimensional and electrical parameters have become less accurate in the deep-submicron regime, which drives the need for better estimation approaches especially in the educational and research domains. We present DeepScaleTool, a tool for the accurate estimation of deep-submicron technology scaling by modeling and curve fitting published data by a leading commercial fabrication company for silicon fabrication technology generations from 130~nm to 7~nm for the key parameters of area, delay, and energy. Compared to 10~nm--7~nm scaling data published by a leading foundry, the DeepScaleTool achieves an error of 1.7% in area, 2.5% in delay, and 5% in power. This compares favorably with another leading academic estimation method that achieves an error of 24% in area, 9.1% in delay, and 24.9% in power.