Quantum Gate Pattern Recognition and Circuit Optimization for Scientific Applications

TL;DR

This paper presents AQCEL, a multi-tiered quantum circuit optimization protocol that recognizes gate patterns and reduces circuit complexity, significantly improving efficiency for quantum algorithms like high energy physics simulations.

Contribution

The paper introduces AQCEL, a novel multi-tiered optimization method combining pattern recognition and redundancy elimination for quantum circuits.

Findings

Significant gate count reduction in high energy physics quantum algorithms

AQCEL is generic and applicable to various quantum algorithms

Potential for demonstration on quantum hardware with polynomial resources

Abstract

There is no unique way to encode a quantum algorithm into a quantum circuit. With limited qubit counts, connectivities, and coherence times, circuit optimization is essential to make the best use of near-term quantum devices. We introduce two separate ideas for circuit optimization and combine them in a multi-tiered quantum circuit optimization protocol called AQCEL. The first ingredient is a technique to recognize repeated patterns of quantum gates, opening up the possibility of future hardware co-optimization. The second ingredient is an approach to reduce circuit complexity by identifying zero- or low-amplitude computational basis states and redundant gates. As a demonstration, AQCEL is deployed on an iterative and efficient quantum algorithm designed to model final state radiation in high energy physics. For this algorithm, our optimization scheme brings a significant reduction in the gate count without losing any accuracy compared to the original circuit. Additionally, we have investigated whether this can be demonstrated on a quantum computer using polynomial resources. Our technique is generic and can be useful for a wide variety of quantum algorithms.