A hardware-efficient leakage-reduction scheme for quantum error correction with superconducting transmon qubits

TL;DR

This paper introduces a hardware-efficient leakage-reduction scheme for superconducting transmon qubits in quantum error correction, significantly reducing leakage lifetime and logical error rates without extra hardware overhead.

Contribution

The proposed scheme mitigates leakage in transmon-based surface codes using two LRUs without increasing hardware or cycle time, enabling scalable quantum error correction.

Findings

Leakage lifetime reduced to nearly 1 QEC cycle

Significant decrease in logical error rate

Effective even with limited LRU fidelity

Abstract

Leakage outside of the qubit computational subspace poses a threatening challenge to quantum error correction (QEC). We propose a scheme using two leakage-reduction units (LRUs) that mitigate these issues for a transmon-based surface code, without requiring an overhead in terms of hardware or QEC-cycle time as in previous proposals. For data qubits we consider a microwave drive to transfer leakage to the readout resonator, where it quickly decays, ensuring that this negligibly affects the coherence within the computational subspace for realistic system parameters. For ancilla qubits we apply a $|1\rangle\leftrightarrow|2\rangle$ $\pi$ pulse conditioned on the measurement outcome. Using density-matrix simulations of the distance-3 surface code we show that the average leakage lifetime is reduced to almost 1 QEC cycle, even when the LRUs are implemented with limited fidelity. Furthermore, we show that this leads to a significant reduction of the logical error rate. This LRU scheme opens the prospect for near-term scalable QEC demonstrations.